PCI_COMMON_CONFIG

DMDLL_PCIGetCommonConfig, DMDLL_PCIRawLevelEnumeratePCIFunctions 함수에서 사용하는 구조체(ref, PCI Specification) PCI 스팩에 준하여, 모든 PCI, PCI Express 카드가 제공해야 하는 표준 Configuration Register의 정보를 담습니다.


Description

#define PCI_TYPE0_ADDRESSES 6
#define PCI_TYPE1_ADDRESSES 2
#define PCI_TYPE2_ADDRESSES 5
typedef struct
_PCI_COMMON_HEADER
{
    USHORT VendorID; // (ro)
    USHORT DeviceID; // (ro)
    USHORT Command; // Device control
    USHORT Status;
    UCHAR RevisionID; // (ro)
    UCHAR ProgIf; // (ro)
    UCHAR SubClass; // (ro)
    UCHAR BaseClass; // (ro)
    UCHAR CacheLineSize; // (ro+)
    UCHAR LatencyTimer; // (ro+)
    UCHAR HeaderType; // (ro)
    UCHAR BIST; // Built in self test

    union {
        struct _PCI_HEADER_TYPE_0 {
            ULONG BaseAddresses[PCI_TYPE0_ADDRESSES];
            ULONG CIS;
            USHORT SubVendorID;
            USHORT SubSystemID;
            ULONG ROMBaseAddress;
            UCHAR CapabilitiesPtr;
            UCHAR Reserved1[3];
            ULONG Reserved2;
            UCHAR InterruptLine; //
            UCHAR InterruptPin; // (ro)
            UCHAR MinimumGrant; // (ro)
            UCHAR MaximumLatency; // (ro)
        } type0;

        //
        // PCI to PCI Bridge
        //

        struct _PCI_HEADER_TYPE_1 {
            ULONG BaseAddresses[PCI_TYPE1_ADDRESSES];
            UCHAR PrimaryBus;
            UCHAR SecondaryBus;
            UCHAR SubordinateBus;
            UCHAR SecondaryLatency;
            UCHAR IOBase;
            UCHAR IOLimit;
            USHORT SecondaryStatus;
            USHORT MemoryBase;
            USHORT MemoryLimit;
            USHORT PrefetchBase;
            USHORT PrefetchLimit;
            ULONG PrefetchBaseUpper32;
            ULONG PrefetchLimitUpper32;
            USHORT IOBaseUpper16;
            USHORT IOLimitUpper16;
            UCHAR CapabilitiesPtr;
            UCHAR Reserved1[3];
            ULONG ROMBaseAddress;
            UCHAR InterruptLine;
            UCHAR InterruptPin;
            USHORT BridgeControl;
        } type1;

        //
        // PCI to CARDBUS Bridge
        //

        struct _PCI_HEADER_TYPE_2 {
            ULONG SocketRegistersBaseAddress;
            UCHAR CapabilitiesPtr;
            UCHAR Reserved;
            USHORT SecondaryStatus;
            UCHAR PrimaryBus;
            UCHAR SecondaryBus;
            UCHAR SubordinateBus;
            UCHAR SecondaryLatency;
            struct {
                ULONG Base;
                ULONG Limit;
            } Range[PCI_TYPE2_ADDRESSES - 1];
            UCHAR InterruptLine;
           UCHAR InterruptPin;
           USHORT BridgeControl;
        } type2;
    } u;
}PCI_COMMON_HEADER, *PPCI_COMMON_HEADER;

#ifdef __cplusplus
typedef struct
_PCI_COMMON_CONFIG : PCI_COMMON_HEADER
{
    UCHAR DeviceSpecific[192];
}PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;

#else
typedef struct
_PCI_COMMON_CONFIG 
{
    PCI_COMMON_HEADER DUMMYSTRUCTNAME;
    UCHAR DeviceSpecific[192];
}PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
#endif

PCI 스팩을 참조


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